A secure enclave is a piece of a chip that runs separately from the rest. It has its own memory, its own access controls, and its own threat model. Code running in the enclave is protected from code running outside the enclave, even if the outside code is privileged operating system code or even hypervisor code. The promise is that you can run sensitive workloads on shared infrastructure without worrying about the rest of the system.
Every major silicon vendor has a version of this. Intel calls theirs Software Guard Extensions, then Trust Domain Extensions. AMD calls theirs Secure Encrypted Virtualization. Apple has the Secure Enclave Processor. ARM has TrustZone. Each implementation has different boundaries, different attestation mechanisms, and different threat models. Each is now confronting the same question: what does post-quantum cryptography mean for me?
This article maps the current landscape. We cover what each enclave does, where the cryptography lives, and what is publicly known about each vendor's post-quantum plans. The goal is to help engineers and security architects understand which enclave technology fits which use case and what to expect through 2027 and beyond.
What enclaves protect
The threat model varies by vendor, but the common goal is to protect a workload from the rest of the system. Intel SGX protects user-mode enclaves from privileged operating system code. Intel TDX protects entire virtual machines from the hypervisor. AMD SEV-SNP protects virtual machines from the hypervisor with stronger guarantees than the original SEV. Apple Secure Enclave protects keys and biometrics from the main application processor. ARM TrustZone splits the chip into Secure World and Normal World.
Cryptography is central to all of these. Each enclave has memory encryption to keep data confidential when it sits in DRAM. Each has measurement and attestation mechanisms so that a remote party can verify what code is running. Each has key derivation primitives for storing data sealed to the enclave's identity.
The cryptographic algorithms used vary. Memory encryption typically uses AES with a key per enclave or per virtual machine. Attestation uses asymmetric signatures, traditionally ECDSA on specific curves. Key derivation uses standard KDF constructions over symmetric primitives. The post-quantum question is which of these primitives need to change and on what timeline.
Intel SGX, the original enclave
Intel Software Guard Extensions launched in 2015 with the Skylake processor generation. SGX defines an enclave as a userspace memory region encrypted by the processor and accessible only to code that has been measured into the enclave at creation time. The boundaries are enforced by hardware. Even the operating system kernel cannot read enclave memory directly.
SGX uses Intel's Provisioning Service for attestation. An enclave produces a quote signed by an Intel-generated provisioning key. Verifiers contact Intel's attestation service to confirm that the quote is genuine and that the enclave's measurement matches expected values. The attestation chain uses ECDSA over P-256.
For post-quantum, Intel has signaled that future processor generations will support hybrid post-quantum attestation. The exact timeline is not public, but Intel has been actively participating in NIST standardization and in IETF discussions. Existing SGX deployments will continue to use ECDSA for the foreseeable future, with migration happening through new processor generations.
SGX has had a complicated security history with side-channel attacks like Foreshadow and SGAxe. Intel has issued microcode updates and architectural changes to address each issue. The post-quantum migration is happening in parallel with this ongoing security work, not as a replacement for it.
Intel TDX, the virtual machine successor
Intel Trust Domain Extensions, TDX, launched with Sapphire Rapids and is the successor to SGX for confidential computing workloads. Unlike SGX, which protects userspace enclaves, TDX protects entire virtual machines from the hypervisor. This is a better fit for cloud workloads where customers run unmodified operating systems.
TDX uses similar cryptographic primitives to SGX but in a different organization. The trust domain is established by hardware-managed keys. Attestation is provided through a quoting infrastructure similar to SGX's. The signing primitives are currently ECDSA-based.
Intel has stated publicly that TDX will gain post-quantum attestation in future versions. This aligns with the broader Intel post-quantum strategy. Production timelines are not yet announced, but the roadmap appears to track the broader silicon refresh cycle.
AMD Secure Encrypted Virtualization
AMD SEV protects virtual machines through encryption of guest memory with per-VM keys. The original SEV protected against memory snooping but not against malicious hypervisors. SEV-ES added register state encryption. SEV-SNP, current as of late 2024 and standard on EPYC Milan and later, adds integrity protection that defends against malicious hypervisor manipulation.
SEV uses AES for memory encryption with hardware-managed keys. The Platform Security Processor, PSP, is a separate ARM core inside the EPYC chip that manages the cryptographic operations. Attestation uses ECDSA-style signatures over the platform's measurements.
AMD has stated that future generations will include post-quantum cryptography in attestation. The PSP is essentially a small computer that can run new firmware, so adding post-quantum algorithms is a firmware update for newer chips. Older chips may not have the headroom.
For AMD's commercial roadmap, the post-quantum transition is paced by the broader confidential computing customer demand. As cloud providers, particularly Microsoft Azure and Google Cloud, request post-quantum attestation, AMD will deliver it. Expectations are for production support across 2025 to 2027.
Apple Secure Enclave Processor
Apple's Secure Enclave is a coprocessor inside Apple silicon that handles biometrics, keys, and platform security. It dates back to the A7 processor in 2013 and has been refined across every generation since. Apple Silicon Macs and recent iPhones, iPads, and Apple Watches all have a Secure Enclave.
The Apple Platform Security Guide, published at security.apple.com, describes the Secure Enclave architecture. The Secure Enclave Processor runs its own operating system, sepOS, separate from the main iOS or macOS kernel. It has its own memory and its own cryptographic engines, including AES, SHA, and elliptic curve hardware.
Apple has been forward-leaning on post-quantum cryptography. iMessage moved to PQ3, a hybrid post-quantum protocol, in 2024. The Apple Security Research blog has published technical details. Apple's broader silicon roadmap will eventually bring post-quantum primitives into the Secure Enclave for general key management, although the exact timeline is not yet public.
ARM TrustZone
ARM TrustZone is a system-wide architectural feature, not a separate processor. The chip operates in either Secure World or Normal World, with hardware enforcement of the boundary. Most cryptography ships in Secure World firmware, often called the Trusted Execution Environment, TEE.
TrustZone is widely deployed on ARM-based devices including Android smartphones, embedded systems, and many Internet of Things devices. The exact TEE varies by vendor. Qualcomm's Trusted Execution Environment, Samsung's TEEGRIS, and the open-source OP-TEE all use TrustZone underneath.
For post-quantum, the picture is fragmented. Each TEE vendor has their own roadmap. Open-source OP-TEE has experimental post-quantum support in development branches. Production smartphones are mostly still on classical algorithms, with hybrid migrations announced for upcoming Android versions.
ARM itself, as the architecture provider, has been adding cryptographic instruction extensions over the last several years. Dedicated post-quantum acceleration is not yet in production silicon; today's extensions accelerate hashing and AES, which post-quantum schemes lean on heavily.
Microsoft Pluton
Microsoft Pluton is a security processor co-developed with AMD, Intel, and Qualcomm. Pluton sits on the same die as the main CPU, providing a hardware root of trust without a separate TPM chip. Pluton debuted in AMD's Ryzen 6000 mobile processors (2022) and ships in Qualcomm's Snapdragon X Elite; Intel has so far kept its own security engine instead.
Microsoft has stated that Pluton will be a key piece of the Windows post-quantum migration. As Windows adopts hybrid post-quantum cryptography in TLS, BitLocker, and other features, Pluton will provide the hardware-backed key storage and attestation. The exact timeline is publicly described in Microsoft Security Blog posts.
Because Pluton is firmware-updateable, post-quantum support can be added through Windows Update without hardware changes. This is a significant advantage over discrete TPM chips that may have less flexibility.
Google Titan
Google's Titan family includes Titan M for Pixel phones and Titan Security Key for authentication. The Titan chip is a hardware root of trust that handles the secure boot, attestation, and key management for Google's hardware.
Google has been active in post-quantum standardization through its Chrome team, with hybrid post-quantum TLS available in Chrome and on Google's servers. The Titan chip itself, as a piece of silicon, faces the same constraints as other secure enclaves: post-quantum support requires either a firmware update or a new chip generation.
Google publishes information on Titan at cloud.google.com and security.google.com. The post-quantum direction is consistent with Google's broader cryptographic agility strategy.
Comparing the platforms
For confidential computing in the cloud, Intel TDX and AMD SEV-SNP are the main options. Both are used by major cloud providers. Both are expected to support post-quantum attestation in upcoming generations. Customer choice between the two often comes down to cloud provider availability and specific feature requirements.
For consumer devices, the picture is dominated by Apple Silicon, ARM TrustZone with various TEEs, and Microsoft Pluton on Windows. Apple has the strongest publicly stated post-quantum direction. Pluton is positioned to enable Windows post-quantum migration. ARM TEEs vary by vendor.
For embedded devices and IoT, ARM TrustZone is the most common option, often with OP-TEE as the firmware. Discrete secure elements like the Microchip ATECC608 are also widely used, with post-quantum versions starting to appear from security-focused vendors.
How QNSQY fits
QNSQY runs in user space on commodity processors. It does not require a secure enclave to operate. The cryptographic operations happen in process memory, with the same protections as any user application.
QNSQY does not require enclave hardware: its threat model assumes keys live on a general-purpose machine, hardened with memory locking, zeroization, and OS-level sandboxing. Enclave and HSM integration for key custody is on the roadmap for enterprise deployments, and the two approaches are complementary rather than competing.
Most QNSQY users do not need this level of hardware integration. The hybrid post-quantum file format provides strong protection without enclave technology. For users who need it, the file format is portable across platforms with different enclave technologies.
Yubikey integration covers a related approach using hardware tokens for key storage.
Frequently asked questions
What is a secure enclave? A piece of a processor or a separate processor that runs cryptographic operations and stores keys in isolation from the main system. Examples include Intel SGX, AMD SEV, Apple Secure Enclave, and ARM TrustZone.
Do enclaves currently support post-quantum cryptography? Most do not yet, although vendors are actively working on it. Apple's PQ3 for iMessage uses post-quantum cryptography. Intel, AMD, and Microsoft have stated roadmaps. ARM TEEs vary by vendor.
Why does enclave attestation matter for post-quantum? Attestation lets a remote party verify what code is running on a remote machine. The signatures used in attestation today rely on classical algorithms that quantum computers will eventually break. Migrating to post-quantum signatures preserves attestation security in a quantum future.
Can existing enclaves be retrofitted to support post-quantum? Some can through firmware updates, like Microsoft Pluton. Others require new silicon. The migration is happening through normal hardware refresh cycles.
Should I wait for post-quantum enclaves before deploying applications? No. Software-level post-quantum cryptography like QNSQY can protect data today. Enclave-level post-quantum will arrive in coming years for those who need hardware-backed key storage.
Sources
- Intel SGX Documentation, https://www.intel.com/content/www/us/en/developer/topic-technology/software-guard-extensions/overview.html
- Intel TDX Documentation, https://www.intel.com/content/www/us/en/developer/tools/trust-domain-extensions/overview.html
- AMD SEV Documentation, https://www.amd.com/en/processors/amd-secure-encrypted-virtualization
- Apple Platform Security Guide, https://support.apple.com/guide/security/welcome/web
- ARM TrustZone Documentation, https://developer.arm.com/Architectures/TrustZone
- Microsoft Pluton, https://www.microsoft.com/en-us/security/blog/2020/11/17/meet-the-microsoft-pluton-processor-the-security-chip-designed-for-the-future-of-windows-pcs/
- Google Cloud Confidential Computing, https://cloud.google.com/confidential-computing
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